Speedier Nanotube Circuits

Technology Review

Stanford University researchers recently expanded on a earlier study involving the development of faster nanotube circuits, which could lead to their use in complex integrated circuits. Stanford professors H-S Philip Wong and Subhasish Mitra previously had used a stamping technique to transfer nanotubes grown on quartz to a silicon-dioxide wafer for fabrication into transistor arrays and circuits. However, the researchers were only able to do one transfer step before the nanotubes became tangled, resulting in strange interactions and less current. In the new experiment, the researchers put down a thin layer of gold with each stamp. After the gold and nanotubes were in place, the researchers etched away areas of gold where the electrical contacts would go. These holes were filled with a metal contact material such as titanium or palladium, and then the rest of the gold was etched away. The entire structure was built on top of a silicon dioxide wafer patterned with back gates for the transistors. Mitra says the group has constructed 20 nanotube transfer steps for a density of 100 nanotubes per micrometer. Many experts believe that carbon nanotubes show the greatest promise for replacing silicon in future semiconductors.

From "Speedier Nanotube Circuits"
Technology Review (04/08/11) Katherine Bourzac
View Full Article